Decoding method, memory storage device and memory control circuit unit

解码方法、存储器存储装置及存储器控制电路单元

Abstract

The invention provides a decoding method, a memory storage device and a memory control circuit unit. The decoding method comprises the following steps: reading a plurality of storage units according to at least one hard decision making voltage to obtain at least one hard bit; carrying out an odd-even check procedure on the hard bit to obtain a plurality of syndromes; judging whether the hard bit has at least one fault or not according to the syndromes; and if the hard bit has the fault, updating the hard bit according to channel information of the hard bit and checking weight information corresponding to the hard bit.
本发明提供一种解码方法、存储器存储装置及存储器控制电路单元,其中此解码方法包括:根据至少一硬决策电压读取多个存储单元,以取得至少一硬比特;对所述硬比特执行奇偶校验程序,以取得多个校验子;根据所述校验子判断所述硬比特是否具有至少一错误;若所述硬比特具有所述错误,根据所述硬比特的通道信息与对应于所述硬比特的校验权重信息来更新所述硬比特。

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